New Intel Architectures and Technologies Target Expanded Market Opportunities

Intel Architecture Day 7

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At Intel’s recent Architecture Day, Raja Koduri, Intel’s senior vice president of Core and Visual Computing, outlined a strategic shift for the company’s design and engineering model. This shift combines a series of foundational building blocks that leverage a world-class portfolio of technologies and intellectual property (IP) within the company.

Architecture Day Fact Sheet: New Intel Architectures and Technologies Target Expanded Market Opportunities

This approach is designed to allow Intel to drive an accelerated pace of innovation and leadership, and will be anchored across six strategic pillars:

2d and 3d packaging drive new design flexibility
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Process: Access to leadership process technology remains essential to building leadership products. Advanced packaging solutions will enable Intel to continue exponential scaling in computing density by extending transistor density to the third dimension.

Architecture: The future is a diverse mix of scalar, vector, matrix and spatial architectures deployed in CPU, GPU, accelerator and FPGA sockets, enabled by a scalable software stack, integrated into systems by advanced packaging technology.

Memory: High-capacity, high-speed storage is crucial for next-generation computing workloads. Intel is uniquely positioned to combine in-package memory and Intel® Optane™ technology to fill gaps in the memory hierarchy to provide bandwidth closer to the silicon die.

Interconnect: Communication scales from wireless connections for 5G infrastructure to silicon-level package and die interconnects. Only by offering a complete range of leading interconnect products enables the heterogeneous computing landscape at scale.

Security: With the emergence of new threats, Intel has all the components to build a “better together” security strategy. Intel is uniquely positioned to deliver security technologies that help improve the end-to-end and to make security advancements a key differentiator.

Software: For every order of magnitude performance potential of a new hardware architecture there are two orders of magnitude performance enabled by software. A common set of tools that can address Intel silicon for developers is critical to exponential scaling.

Q&A – RAJA KODURI

Why do you believe that in this new era of computing Intel should anchor its product and technology strategy around these six pillars?

The landscape for computing has evolved dramatically over the past decade. We operate in a world where we generate data at a faster rate than our ability to analyze, understand and help secure it. We see immense demand for computing architectures that evolve rapidly and scale exponentially. We have a bold engineering vision over the next five years to deliver 10 petaflops of compute and 10 petabytes of data within 10 milliseconds to every person in the world. We believe these six technology pillars are the key enablers for us to drive the needed product innovation to achieve this.

How do the IP and resources in the six pillars best position Intel to win and deliver differentiated products from your competitors?

When I joined Intel, I was amazed at the sheer volume and breadth of IP available to us. In nearly three decades in the industry, I’ve never seen anything like it. The scale of these resources gives us a differentiated set of technologies in each of these pillars to apply as we drive wave after wave of innovation for client, edge and cloud computing environments. I believe we are uniquely positioned to deliver leadership across all six of these pillars which provides a foundation for sustained innovation nobody else can offer.

3d packaging a catalyst for product innovation
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Why did the innovation model have to change? 

The world has changed and so has our business; we’ve moved to target an addressable market north of $300 billion1. The rising demand for computing provides us with a chance to change, mold and expand Intel in an unprecedented manner. We have a responsibility not only to ourselves, but also to our customers who trust us with their businesses, critical data and computing needs, to reinvent our products and strategy for developing technologies for the next decade and beyond.

How is Intel applying the model today and in the future? 

We’re applying the model today across our engineering organization as we bring innovative new product and technology initiatives to the world next year and into the future. Whether it’s the advanced packaging innovation through “Foveros” logic stacking or the “One API” approach to software developers, we’re taking steps to drive sustainable new waves of innovation.

How does the shifting landscape in computing workloads impact how Intel will build its next-generation products?

The workloads associated with this computing landscape are changing. No longer do consumers or enterprise customers have simple applications that can be addressed with straightforward scalar architectures alone. Instead we see programs that are solving problems faster by integrating additional architectures from graphics processors to artificial intelligence accelerators to image processors and even adaptable designs like FPGAs powered by new memory technologies. We will combine computing and architecture innovations through high-speed interconnects with new models for software development that simplify APIs for developers and allow more performance and efficiency to be unlocked from Intel computing architectures.

How do Intel’s investments in the six pillars drive Moore’s Law-like leaps forward in user experience?

In the previous generations, the answer has been that transistor density and Moore’s Law will play the lead role to solve computing problems. But as the process node transitions have slowed from the pace of the previous decades, it is the essence of Moore’s Law that continues to provide new technologies and capabilities to meet the demands of modern computing. The message of Moore’s Law is about more than transistors alone, with the combination of transistors, architectural research, connectivity advancements, faster memory systems, and software working together to drive it forward.

1Intel calculated 2022 total addressable market opportunity derived from industry analyst reports and internal estimates.

Forward-Looking Statements

Statements in this discussion that refer to future plans and expectations, including with respect to Intel’s future technologies and the expected benefits of such technologies, are forward-looking statements that involve a number of risks and uncertainties. Words such as “anticipates,” “expects,” “intends,” “goals,” “plans,” “believes,” “seeks,” “estimates,” “continues,” “may,” “will,” “would,” “should,” “could,” and variations of such words and similar expressions are intended to identify such forward-looking statements. Statements that refer to or are based on estimates, forecasts, projections, uncertain events or assumptions, including statements relating to total addressable market (TAM) or market opportunity and anticipated trends in our businesses or the markets relevant to them, also identify forward-looking statements. Such statements are based on current expectations and involve many risks and uncertainties that could cause actual results to differ materially from those expressed or implied in these forward-looking statements. Important factors that could cause actual results to differ materially from the company’s expectations are set forth in Intel’s most recent earnings release dated October 25, 2018, which is included as an exhibit to Intel’s Form 8-K furnished to the SEC on such date. Additional information regarding these and other factors that could affect Intel’s results is included in Intel’s SEC filings, including the company’s most recent reports on Forms 10-K and 10-Q. Copies of Intel’s Form 10-K, 10-Q and 8-K reports may be obtained by visiting our Investor Relations website at www.intc.com or the SEC’s website at www.sec.gov.

 

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Fact Sheet: New Intel Architectures and Technologies Target Expanded Market Opportunities

Intel Architecture Day 7

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SANTA CLARA, Calif., Dec. 12, 2018 – At Intel “Architecture Day,” top executives, architects and fellows revealed next-generation technologies and discussed progress on a strategy to power an expanding universe of data-intensive workloads for PCs and other smart consumer devices, high-speed networks, ubiquitous artificial intelligence (AI), specialized cloud data centers and autonomous vehicles.

Intel demonstrated a range of 10nm-based systems in development for PCs, data centers and networking, and previewed other technologies targeted at an expanded range of workloads.

More: New Intel Architectures and Technologies Target Expanded Market Opportunities

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The company also shared its technical strategy focused on six engineering segments where significant investments and innovation are being pursued to drive leaps forward in technology and user experience. They include: advanced manufacturing processes and packaging; new architectures to speed-up specialized tasks like AI and graphics; super-fast memory; interconnects; embedded security features; and common software to unify and simplify programming for developers across Intel’s compute roadmap.

Together these technologies lay the foundation for a more diverse era of computing in an expanded addressable market opportunity of more than $300 billion by 2022.1

Intel Architecture Day Highlights:

  • Industry-First 3D Stacking of Logic Chips: Intel demonstrated a new 3D packaging technology, called “Foveros,” which for the first time brings the benefits of 3D stacking to enable logic-on-logic integration.
     
    Foveros paves the way for devices and systems combining high-performance, high-density and low-power silicon process technologies. Foveros is expected to extend die stacking beyond traditional passive interposers and stacked memory to high-performance logic, such as CPU, graphics and AI processors for the first time.
     
    The technology provides tremendous flexibility as designers seek to “mix and match” technology IP blocks with various memory and I/O elements in new device form factors. It will allow products to be broken up into smaller “chiplets,” where I/O, SRAM and power delivery circuits can be fabricated in a base die and high-performance logic chiplets are stacked on top.
     
    Intel expects to launch a range of products using Foveros beginning in the second half of 2019. The first Foveros product will combine a high-performance 10nm compute-stacked chiplet with a low-power 22FFL base die. It will enable the combination of world-class performance and power efficiency in a small form factor.
     
    Foveros is the next leap forward following Intel’s breakthrough Embedded Multi-die Interconnect Bridge (EMIB) 2D packaging technology, introduced in 2018.
     
  • New Sunny Cove CPU Architecture: Intel introduced Sunny Cove, Intel’s next-generation CPU microarchitecture designed to increase performance per clock and power efficiency for general purpose computing tasks, and includes new features to accelerate special purpose computing tasks like AI and cryptography. Sunny Cove will be the basis for Intel’s next-generation server (Intel® Xeon®) and client (Intel® Core™) processors later next year. Sunny Cove features include:
     
    • Enhanced microarchitecture to execute more operations in parallel.
    • New algorithms to reduce latency.
    • Increased size of key buffers and caches to optimize data-centric workloads.
    • Architectural extensions for specific use cases and algorithms. For example, new performance-boosting instructions for cryptography, such as vector AES and SHA-NI, and other critical use cases like compression and decompression.

     
    Sunny Cove enables reduced latency and high throughput, as well as offers much greater parallelism that is expected to improve experiences from gaming to media to data-centric applications.

  • Next-Generation Graphics: Intel unveiled new Gen11 integrated graphics with 64 enhanced execution units, more than double previous Intel Gen9 graphics (24 EUs), designed to break the 1 TFLOPS barrier. The new integrated graphics will be delivered in 10nm-based processors beginning in 2019.
     
    The new integrated graphics architecture is expected to double the computing performance-per-clock compared to Intel Gen9 graphics. With >1 TFLOPS performance capability, this architecture is designed to increase game playability. At the event, Intel showed Gen11 graphics nearly doubling the performance of a popular photo recognition application when compared to Intel’s Gen9 graphics. Gen11 graphics is expected to also feature an advanced media encoder and decoder, supporting 4K video streams and 8K content creation in constrained power envelopes. Gen11 will also feature Intel® Adaptive Sync technology enabling smooth frame rates for gaming.
     
    Intel also reaffirmed its plan to introduce a discrete graphics processor by 2020.
  • “One API” Software: Intel announced the “One API” project to simplify the programming of diverse computing engines across CPU, GPU, FPGA, AI and other accelerators. The project includes a comprehensive and unified portfolio of developer tools for mapping software to the hardware that can best accelerate the code. A public project release is expected to be available in 2019.
  • Memory and Storage: Intel discussed updates on Intel® Optane™ technology and the products based upon that technology. Intel® Optane™ DC persistent memory is a new product that converges memory-like performance with the data persistence and large capacity of storage. The revolutionary technology brings more data closer to the CPU for faster processing of bigger data sets like those used in AI and large databases. Its large capacity and data persistence reduces the need to make time-consuming trips to storage, which can improve workload performance. Intel Optane DC persistent memory delivers cache line (64B) reads to the CPU. On average, the average idle read latency with Optane persistent memory is expected to be about 350 nanoseconds when applications direct the read operation to Optane persistent memory, or when the requested data is not cached in DRAM. For scale, an Optane DC SSD has an average idle read latency of about 10,000 nanoseconds (10 microseconds), a remarkable improvement.2 In cases where requested data is in DRAM, either cached by the CPU’s memory controller or directed by the application, memory sub-system responsiveness is expected to be identical to DRAM (<100 nanoseconds).

3d packaging a catalyst for product innovation
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The company also showed how SSDs based on Intel’s 1 Terabit QLC NAND die move more bulk data from HDDs to SSDs, allowing faster access to that data.
 
The combination of Intel Optane SSDs with QLC NAND SSDs will enable lower latency access to data used most frequently. Taken together, these platform and memory advances complete the memory and storage hierarchy providing the right set of choices for systems and applications.

  • Deep Learning Reference Stack: Intel is releasing the Deep Learning Reference Stack, an integrated, highly-performant open source stack optimized for Intel® Xeon® Scalable platforms. This open source community release is part of our effort to ensure AI developers have easy access to all of the features and functionality of the Intel platforms. The Deep Learning Reference Stack is highly-tuned and built for cloud native environments. With this release, Intel is enabling developers to quickly prototype by reducing the complexity associated with integrating multiple software components, while still giving users the flexibility to customize their solutions.
    • Operating System: Clear Linux* OS is customizable to individual development needs, tuned for Intel platforms and specific use cases like deep learning;
    • Orchestration: Kubernetes* manages and orchestrates containerized applications for multi-node clusters with Intel platform awareness;
    • Containers: Docker* containers and Kata* containers utilize Intel® Virtualization Technology to help secure container;
    • Libraries: Intel® Math Kernel Library for Deep Neural Networks (MKL DNN) is Intel’s highly optimized math library for mathematical function performance;
    • Runtimes: Python* providing application and service execution runtime support is highly tuned and optimized for Intel architecture;
    • Frameworks: TensorFlow* is a leading deep learning and machine learning framework;
    • Deployment: KubeFlow* is an open-source industry-driven deployment tool that provides a fast experience on Intel architecture, ease of installation and simple use.

1Intel calculated 2022 total addressable market opportunity derived from industry analyst reports and internal estimates.

2Average idle read latency is the mean time for read data to return to a requesting processor. This is an average; some latencies will be longer. Tests document performance of components on a particular test, in specific systems. Differences in hardware, software or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks.

Forward-Looking Statements

Statements in this news summary that refer to future plans and expectations, including with respect to Intel’s future products and the expected availability and benefits of such products, are forward-looking statements that involve a number of risks and uncertainties. Words such as “anticipates,” “expects,” “intends,” “goals,” “plans,” “believes,” “seeks,” “estimates,” “continues,” “may,” “will,” “would,” “should,” “could,” and variations of such words and similar expressions are intended to identify such forward-looking statements. Statements that refer to or are based on estimates, forecasts, projections, uncertain events or assumptions, including statements relating to total addressable market (TAM) or market opportunity and anticipated trends in our businesses or the markets relevant to them, also identify forward-looking statements. Such statements are based on the company’s current expectations and involve many risks and uncertainties that could cause actual results to differ materially from those expressed or implied in these forward-looking statements. Important factors that could cause actual results to differ materially from the company’s expectations are set forth in Intel’s earnings release dated October 25, 2018, which is included as an exhibit to Intel’s Form 8-K furnished to the SEC on such date. Additional information regarding these and other factors that could affect Intel’s results is included in Intel’s SEC filings, including the company’s most recent reports on Forms 10-K and 10-Q. Copies of Intel’s Form 10-K, 10-Q and 8-K reports may be obtained by visiting our Investor Relations website at www.intc.com or the SEC’s website at www.sec.gov.

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Intel Announces Neuromorphic Computing Research Collaborators

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Kapoho Bay is Intel’s codename for a a USB form factor based on the Loihi neuromorphic research chip system. Kapoho Bay provides a USB interface to Loihi, allowing access with peripherals. (Credit: Walden Kirsch/Intel Corporation)
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What’s New: Today, Intel named academic, government and corporate research groups participating in its Intel Neuromorphic Research Community (INRC) and discussed research progress from the inaugural INRC symposium held in October. The goal of the INRC is to tackle the challenges facing the adoption of neuromorphic architectures for mainstream computing applications. INRC members will use Intel’s Loihi research chip as the architectural focal point for research and development. Intel hopes the findings of this community will drive future improvement of neuromorphic architectures, software and systems, eventually leading to the commercialization of this promising technology.

“While there are many important unsolved neuromorphic computing research problems to explore at all levels of the computing stack, we believe the state of neuromorphic hardware currently leads the state of neuromorphic computing software. We’re confident this network of INRC members will rapidly advance the state of neuromorphic learning algorithms and demonstrate the value of this emerging technology for a wide range of applications.”
–Mike Davies, director of the Neuromorphic Computing Lab, Intel

Who is Participating: Fifty projects have been selected to participate in the INRC. Engaged INRC members will receive access to Intel’s Loihi neuromorphic research chip and software, and are invited to participate in technical symposiums where progress, results and insights will be shared among the community. INRC-supported workshops will offer members an opportunity to learn to develop for Loihi in extended hands-on tutorial sessions and hackathons hosted by Intel Labs researchers and collaborators.

Among the 50 selected projects, teams from 13 universities were selected to receive funding to pursue their research plans. These teams come from a wide range of academic institutions around the world, including University of Bern; University of California, Berkeley; University of California, San Diego; Cornell University; University of Göttingen; TU Graz; Harvard University; TU Munich; Radboud University; University of Tennessee; and Villanova University.

Projects have been scheduled to start over a series of four waves, the first of which began in 2018’s third quarter.

Results So Far: In October, Intel held an inaugural gathering of INRC members in Reykjavik, Iceland. More than 60 researchers attended over five days to discuss research plans, learn about Loihi and meet members of the community. Several presentations from early INRC members announced exciting preliminary progress:

  • Chris Eliasmith of Applied Brain Research Inc. (ABR)* shared early benchmarking results evaluating Loihi’s performance running an audio keyword spotting deep network implemented with ABR’s Nengo DL, which runs TensorFlow-trained networks on Loihi. These results show that for real-time streaming data inference applications, Loihi may provide better energy efficiency than conventional architectures by a factor of 2 times to over 50 times, depending on the architecture.
  • Professor Wolfgang Maass of the Institute for Theoretical Computer Science, Technische Universität Graz, discussed his team’s promising discovery of a new class of spiking neural nets that achieve classification accuracies similar to state-of-the-art deep learning models known as long short-term memory (LSTM) networks. LSTMs are commonly used today for speech recognition and natural language processing applications. These new spiking neural networks, named LSNNs, integrate working memory into their operation in a similar manner as LSTMs do, while promising significantly improved efficiency when running on neuromorphic hardware. This work, to be published at the Neural Information Processing Systems conference in December, was developed using a simulator. In collaboration with Intel Labs, Maass’ team is now working on mapping the networks to Loihi. The team shared early accuracy results from the Loihi network, which currently stand within a few percent of the ideal model.
  • Professor Thomas Cleland of Cornell University discussed a set of neuromorphic algorithms for signal restoration and identification in spiking neural networks based on computational principles inspired by the mammalian olfactory system. In work to be published in collaboration with Intel Labs, these algorithms running on Loihi have already shown state-of-the-art learning and classification performance on chemosensor data sets. “These algorithms were derived from mechanistic studies of the mammalian brain’s olfactory circuits, but I anticipate that in generalized form, they will be applicable to a range of similar computational problems such as air and water quality assessment, cancer screening, and genomic expression profiling,” Cleland said.

What Is Neuromorphic Computing: Neuromorphic computing entails nothing less than a bottom-up rethinking of computer architecture. By applying the latest insights from neuroscience, the goal is to create chips that function less like a classical computer and more like a human brain. Neuromorphic chips model how the brain’s neurons communicate and learn, using spikes and plastic synapses that can be modulated based on the timing of events. These chips are designed to self-organize and make decisions in response to learned patterns and associations.

The goal is that one day neuromorphic chips may be able to learn as fast and efficiently as the brain, which still far outperforms today’s most powerful computers. Neuromorphic computing could lead to big advancements in robotics, smart city infrastructure and other applications that require continuous learning and adaptation to evolving, real-world data.

Last year, Intel introduced the Loihi neuromorphic test chip, a first-of-its-kind research chip with an unprecedented combination of neuromorphic features, efficiency, scale and on-chip learning capabilities. Loihi serves as the architectural foundation for the INRC program. Intel provides INRC members with access to this leading neuromorphic chip to accelerate progress in this field of research.

What is Next: Intel has released early versions of its software development kit for Loihi, named Nx SDK, to engaged INRC members. Researchers may remotely log in to Intel’s neuromorphic cloud service to access Loihi hardware and Nx SDK to develop their algorithms, software and applications. Additionally, Intel has supported Applied Brain Research to port its Nengo software framework to work with Loihi. Nengo is freely available today for research use.

Loihi hardware has been made available to select INRC members for research in domains such as robotics that require direct access to hardware. These systems include a USB form factor code-named “Kapoho Bay.” In addition to providing a USB interface to Loihi, Kapoho Bay offers an event-driven hardware interface to the DAVIS 240C DVS silicon retina camera available from iniVation*, among other peripherals.

Next year, Intel and INRC members expect to contribute much of the enabling software and research results to the public domain in the form of publications and open source software. INRC membership is expected to steadily grow, and as the foundational algorithms and SDK components mature, Intel foresees an increasing project focus on real-world applications, ultimately leading to the commercialization of neuromorphic technology.

How to Get Involved: Neuroscientists, computational scientists and machine learning researchers interested in participating in the INRC and developing for Loihi are encouraged to email inrc_interest@intel.com for more information.

Additionally, Intel’s Neuromorphic Computing Lab will support full-day tutorials on Loihi’s systems and software at two upcoming events: at the 2019 Riken International Workshop on Neuromorphic Computing in Kobe, Japan, on March 13, and at the 2019 Neuro Inspired Computing Elements (NICE) Workshop in Albany, New York, on March 29. The tutorials will be open to all registered attendees of these workshops.

More Context: Intel Labs

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Intel Drone Solutions Modernize and Increase Efficiency for US Bridge Inspections

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What’s New: Intel collaborated with two departments of transportation to improve bridge inspections, supplementing manual inspections of the Daniel Carter Beard Bridge connecting Ohio and Kentucky and the Stone Arch Bridge in Minnesota. Throughout the inspections, Intel’s advanced automated commercial drone hardware and software solutions increased efficiency and produced more reliable data in a fraction of the time and cost of traditional methods.

“With bridges worldwide experiencing undetected structural issues due to inefficient inspection and monitoring processes and unreliable data for rehabilitation, it is critical to address this real-world concern of transportation safety with impactful commercial drone applications. Intel’s comprehensive drone solutions not only improve speed and accuracy through increasing automation of existing workflows, but also reduce safety risks and providing engineers and transportation bureaus with more reliable, actionable insights for future planning and safety assessments.”
–Anil Nanduri, Intel vice president and general manager, drone team

Why It Matters: More than 600,000 bridges are in the U.S., and nearly 10 percent of them are currently rated structurally deficient or obsolete. Each bridge is structurally unique and needs regular inspections to achieve safety requirements for general use.

Traditional inspection methods can be dangerous, costly and time-consuming. And they often provide unreliable data. These methods also obstruct daily traffic patterns with road closures, rely on manual labor that doesn’t always capture accurate data for proper rehabilitation assessment, can be prohibitively expensive to publicly funded sources, and require many work hours.

How It Pays Off: Intel’s full suite of commercial drone solutions assisted officials in the full drone workflow, from the flight planning and aerial data capture to the cloud-based digital data management, processing and analytics. In some cases, this resulted in a 40 percent cost savings over standard inspection processes.

How It Works: In collaboration with the Kentucky Transportation Cabinet and Michael Baker International*, Intel used its drone technology to help inspect and analyze the Daniel Carter Beard Bridge, an eight-lane interstate that crosses the Ohio River. Nearly 100,000 vehicles cross the bridge daily, and even minor obstructions, such as lane closures, can result in costly delays. Between lift-off and landing, this automated inspection with Intel® drone technology enabled the bridge to remain open and fully functional while the team completed the assignment. For this inspection, the Intel drone captured about 2,500 high-resolution aerial images, generating 22GB of data that was uploaded into the Intel® Insight Platform. Using the images, a 3D model – or a digital twin of the structure – was generated to aid with analyses and visualization that can also be applied to monitoring the paint deterioration and cable stability of the bridge over time.

Separately, working with the Minnesota Department of Transportation and Collins Engineers*, Intel and its commercial drone technology helped expedite an inspection of the iconic Stone Arch Bridge, a landmark pedestrian and bicycle bridge in Minneapolis, with increased automation. While most bridges are inspected every 24 months, officials inspect the Stone Arch Bridge annually due to the complex nature of the structure’s aging masonry and a fractured steel span. Incorporating Intel technology, MnDOT and Collins Engineers increased efficiency, reducing work hours by 28 percent. The work resulted in an inspection cost savings of approximately 40 percent that could save taxpayers an estimated $160,000 over the next 10 years.

What’s Different: The Intel® Falcon™ 8+ drone performs despite certain external influences such as windy conditions or electromagnetic interference. The robust and advanced flight system provides safe, scalable access to hard-to-reach locations, reducing the need for risky hands-on methods such as rope access.

By programming automated flight paths with Intel® Mission Control, inspectors can capture high-quality aerial data with the push of a button without obstructing commuter’s traffic patterns and while helping to improve safety for workers and travelers. Intel Mission Control enables inspectors to create flight plans for complex 3D structures such as bridges and enable the ability to duplicate flight plans for future inspection missions. The result is a repeatable mission to capture quality consistent data to monitor the condition of the bridge and areas of deterioration down to millimeter accuracy, and to compare that data over time.

The data collected by the drones were uploaded to the Intel® Insight Platform, Intel’s cloud-based digital asset management tool. After collecting additional data in the future, these various sets of information can be compared to detect and monitor changes, allowing experts to extract images and notes about key areas of interest to share more broadly with inspection and transportation bureau teams.

More Context: Drones at Intel

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Intel Looks beyond CMOS to the Future of Logic Devices

mesoWhat’s New: Today, “Nature” published a research paper on the next generation of logic devices authored by researchers from Intel, the University of California, Berkeley, and the Lawrence Berkeley National Laboratory. The paper describes a magneto-electric spin-orbit (MESO) logic device, invented by Intel. MESO devices have the potential to lower voltage by 5 times and energy by 10-30 times when combined with ultralow sleep state power, as compared to today’s complementary metal-oxide-semiconductors (CMOS). While Intel is pursuing CMOS scaling, the company has been working on computing logic options that will emerge in the next decade for the beyond-CMOS era, driving computing energy-efficiency and allowing performance to grow across diverse computing architectures

“We are looking for revolutionary, not evolutionary, approaches for computing in the beyond-CMOS era. MESO is built around low-voltage interconnects and low-voltage magneto-electrics. It brings together quantum materials innovation with computing. We are excited about the progress we have made and are looking forward to future demonstrations of reducing the switching voltage even further toward its potential.”
–Ian Young, Intel Senior Fellow and director of the Exploratory Integrated Circuits group in the Technology and Manufacturing Group

Why it Matters: Intel researchers invented the MESO device, with the memory, interconnect and logic requirements of future computing needs in mind. The MESO device was prototyped at Intel using quantum materials with emergent quantum behaviors at room temperature, with magneto-electric materials developed by Ramamoorthy Ramesh at UC Berkeley and the Lawrence Berkeley National Laboratory. MESO also utilizes spin-orbit transduction effects described by Albert Fert at Unité Mixte de Physique CNRS/Thales.

“MESO is a device built with room temperature quantum materials,” said Sasikanth Manipatruni, senior staff scientist and director of Intel Science and Technology Center on Functional Electronics Integration and Manufacturing. “It is an example of what is possible, and hopefully triggers innovation across industry, academia and the national labs. A number of critical materials and techniques are yet to be developed to allow the new type of computing devices and architectures.”

More Context: Magnetoelectric Spin-Orbit Logic with Non-volatility and Energy Efficiency (DOI) (Nature)

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Images: New Intel RealSense D435i Stereo Depth Camera Adds 6 Degrees of Freedom Tracking

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Photo 1: The Intel RealSense Depth Camera D435i includes an inertial measurement unit that enables developers to create solutions with more advanced depth-sensing and tracking capabilities for applications including drones, robotics and gaming. Intel Corporation introduced the camera on Nov. 13, 2018. (Credit: Intel Corporation)

Photo 2: The Intel RealSense Depth Camera D435i includes an inertial measurement unit that enables developers to create solutions with more advanced depth-sensing and tracking capabilities for applications including drones, robotics and gaming. Intel Corporation introduced the camera on Nov. 13, 2018. (Credit: Intel Corporation)

More: New Intel RealSense D435i Stereo Depth Camera Adds 6 Degrees of Freedom Tracking

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New Intel RealSense D435i Stereo Depth Camera Adds 6 Degrees of Freedom Tracking

Intel RealSense D435i 2

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What’s New: Intel today introduced a new addition to the Intel® RealSense™ D400 series: the Intel RealSense Depth Camera D435i. This latest Intel RealSense camera includes a new inertial measurement unit (IMU) that enables developers to create solutions with more advanced depth-sensing and tracking capabilities for applications including drones, robotics and gaming.

“Intel RealSense technology is used to build products that enrich people’s lives through devices and machines that perceive the world in 3D. With the addition of the IMU, the RealSense D435i enables developers to tackle a new set of challenges related to tracking movement and depth.”
– Sagi Ben Moshe, vice president and general manager, Intel RealSense Group

How It’s Different: The Intel RealSense D435i is the next evolution of the Intel RealSense D435 camera, adding 6 degrees of freedom data from an internal IMU that combines a variety of linear accelerometers with gyroscopes to detect both rotation and translation for three axes, as well as pitch, yaw and roll. For advanced scanning, the IMU provides an extra set of data allowing for dense reconstruction, and provides more reference so the camera doesn’t lose tracking. For example, in robotics, the robotics operating system provides not only vision but position data.

The Intel RealSense D435i runs on the open source Intel RealSense SDK 2.0, which now includes support for the IMU and enables fast, easy development across several programming languages so developers can quickly create prototypes to interact with real or virtual environments.

Why It’s Important: The Intel RealSense D435i provides an extra set of data for developers to create applications with more advanced depth-sensing and tracking in the same 90 mm x 25 mm x 25 mm form factor as the original Intel RealSense D435 Depth Camera. The built-in IMU provides an additional data point for dense 3D model reconstructions and can be used in applications such as gaming, pointing devices and image stabilization. Additional use cases include:

  • Navigation and stabilization for drones and other unmanned systems and robotics
  • Orientation for tracking in fitness and robotics
  • Motion detectors and gesture recognition for gaming and robotics
  • Rotational tracking for augmented reality and virtual reality head-mounted devices

When You Can Get It: The Intel RealSense D435i camera is available for pre-order now. It will begin shipping Nov. 26.

More Context: Intel RealSense D400 Product Page

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Intel Participates in White House Summit on Advancing US Leadership in Quantum Computing

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Intel Corporation’s 49-qubit quantum computing test chip, code-named “Tangle Lake,” was unveiled at 2018 CES in Las Vegas. (Credit: Walden Kirsch/Intel Corporation)
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What’s New: Today, Intel participated in the White House summit on quantum information sciences with leaders from industry, academia and U.S. government agencies. The meeting, to further research and collaboration in quantum computing, was organized by the Office of Science and Technology Policy. Intel will take part in sessions on developing a quantum workforce and removing barriers to quantum innovation.

“When it comes to quantum computing, we are in mile one of a marathon. No single entity can deliver a quantum computer alone. We must partner with our government agencies, academia and other companies to further research and development and develop a quantum workforce. This technology will change the life of everyone on this planet, and we applaud the White House for pulling together this summit to advance American leadership in quantum computing.”
–Dr. Jim Clarke, Intel’s director of quantum hardware

Why Now: The Summit coincides with the National Quantum Initiative Act, which is moving through Congress. The bill would authorize $1.3 billion in funding on quantum information sciences through 2023. The bill has bipartisan support. It passed the House of Representatives on Sept. 13, and is expected to be approved by the Senate.

Why it Matters: Quantum computing holds the promise to exponentially speed up certain algorithms compared with classical computers. If fully realized, quantum computers will have a profound impact on chemistry, medicine, finance, machine learning, artificial intelligence and more.

Quantum technology is in the early stages of development, and will need support from the government, industry and academia. The National Quantum Act will facilitate basic research and technology development. Intel sees opportunities with multiple government agencies to accelerate our internal programs, develop a workforce for computing’s next generation and deliver an important technology for the United States.

More Context: House Takes Important Step in U.S. Quantum Computing Initiative (Jim Clarke Blog) | Intel Applauds Bipartisan Congressional Effort to Accelerate Quantum Computing Research | Quantum Computing at Intel

The post Intel Participates in White House Summit on Advancing US Leadership in Quantum Computing appeared first on Intel Newsroom.

NFL and Intel Outfit Super Bowl LIII Host Mercedes-Benz Stadium with Intel True View

The Intel True View production team

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What’s New: Intel and the National Football League (NFL)* have installed Intel® True View, the leading immersive media technology, in two more NFL stadiums: Nissan Stadium in Nashville, Tennessee, and the home of Super Bowl LIII, Mercedes-Benz Stadium in Atlanta. Together, the NFL and Intel will deliver immersive 360-degree replays that will retell amazing moments of the game in the 13 stadiums equipped with Intel True View and across digital and mobile platforms.

“With the expansion of Intel True View into more stadiums, we have the opportunity to let fans experience game-changing plays on sports’ biggest stage. We’re redefining the way that fans can watch games, as Intel True View brings unique perspectives and insights for everyone, from the casual follower to the die-hard fanatic.”
– James Carwana, vice president and general manager of Intel Sports

Why It Matters: By providing immersive replays, sports fans can see highlights from every vantage point, even from the players’ perspective, without using a helmet camera. Intel True View highlights are the best way to relive amazing NFL moments:

  • Determine what really happened by reviewing the call from multiple perspectives
  • Study form and technique from the best view possible
  • Analyze game strategy and tactics with added commentary and graphics overlay to provide a deeper understanding and appreciation of the game

How It Works: For the 2018 NFL season, 13 NFL stadiums will be equipped with dozens of 5K ultra-high-definition cameras that capture the action, while Intel-based servers process up to 1 terabyte of data for volumetric presentation (height, width and depth) for each 15- to 30-second clip. Using voxels (pixels with volume), the technology renders dynamic replays in multi-perspective 3D to create 360-degree reconstructions of plays that can be viewed from any angle.

Where to See It: Intel True View is installed in 13 NFL stadiums across the AFC and NFC. Starting this week, content is accessible via NFL.com/trueview, the NFL Mobile app, the NFL channel on YouTube* and other endpoints across the NFL and participating teams. Fans will also experience the enhanced replays in-stadium for closer views of the action on the field at the following stadiums:

  • Arizona Cardinals: University of Phoenix Stadium in Glendale, Arizona
  • Atlanta Falcons: Mercedes-Benz Stadium in Atlanta (site of Super Bowl LIII, starting in October)
  • Baltimore Ravens: M&T Bank Stadium in Baltimore
  • Carolina Panthers: Bank of America Stadium in Charlotte, North Carolina
  • Cleveland Browns: FirstEnergy Stadium in Cleveland
  • Houston Texans: NRG Stadium in Houston
  • Indianapolis Colts: Lucas Oil Stadium in Indianapolis
  • Kansas City Chiefs: Arrowhead Stadium in Kansas City, Missouri
  • Minnesota Vikings:S. Bank Stadium in Minneapolis
  • New England Patriots: Gillette Stadium in Foxborough, Massachusetts
  • San Francisco 49ers: Levi’s Stadium in Santa Clara, California
  • Tennessee Titans: Nissan Stadium in Nashville, Tennessee
  • Washington Redskins: FedExField in Landover, Maryland

More Context: Through partnerships with leading sports brands like the NFL, Intel is driving the next wave of powerful technologies that will transform the sports experience for the next generation of fans. For more information on the Intel and NFL partnership, visit Intel’s NFL + Intel True View page.


» Download video: “Intel 360 Replay’s ‘Be the Player’ Gives You a Player’s Point of View”

The post NFL and Intel Outfit Super Bowl LIII Host Mercedes-Benz Stadium with Intel True View appeared first on Intel Newsroom.

Intel Drone Helping to Preserve Korean Cultural Heritage

An Intel® Falcon™ 8+ drone was used to carry out an aerial inspection and survey of Hwahongmun Gate of Korea’s Suwon Hwaseong fortress, a UNESCO World Heritage site and an important part of Korea’s culture and history.

A 3D model of Hwahongmun Gate was generated using thousands of detailed images captured from an Intel Falcon 8+ drone. Drones are emerging as an important tool to not only capture data but also provide a digital archive of history and help in the effort to preserve architectural structures of cultural and historic significance.

More: Intel Drone at Hwahongmun Gate of Korea’s Suwon Hwaseong Fortress (Video) | All Intel Images | Drones at Intel

Korea Drone 1

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